Application and tasks implemented on an integrated circuit can be accelerated by using different processing mechanisms such as a many-core processing system, which is a large scale multi-CPU parallel processing system having multiple processing cores. Applications can then be processed by more than one core processor in parallel so as to improve processing speed. Typical acceleration operation using such a many-core structure requires significant investment in software and soft logic co-design. High-level design (HLD) techniques can partially bridge the software-to-logic design gap but typically require a system with fixed cores that are dedicated to serve certain application needs.
For example, some fixed circuit designs can provide a homogeneous or fixed heterogeneous many-core platform, but these designs are non-scalable. Some reprogrammable systems can offer scalable designs to add processing cores on an as-needed basis, expanded with the potential building of on-demand application-specific high-performance platform with mixed heterogeneous architecture of acceleration processing node, e.g., through a reprogrammable FPGA. These scalable solutions, however, may not cater to the scenario when a custom software solution is needed to manage the core in a dynamic system.
Other solutions and designs for application acceleration that exist in the industry can include many-core communications application programming interface (MCAPI), message passing interface (MPI), and open multi-processing (OpenMP). All of these systems assume a fixed many-core system that focuses on communication between known cores such that specific distributed tasks can be mapped to known fixed cores, instead of addressing the needs of managing a dynamic many-core system design. Thus, these systems are incapable of dynamically changing the available parallel processing cores for application acceleration.